1. Technical Field
The present invention relates to a semiconductor integrated circuit, and more particularly, to a clock cycle control circuit and a semiconductor memory apparatus including thereof.
2. Related Art
A semiconductor apparatus such as a semiconductor memory apparatus typically operates in synchronization with an external clock provided from outside. The frequency of the external clock should be increased for higher speed operations of the semiconductor memory apparatus. The semiconductor apparatus is thus designed to operate in synchronization with a clock having a high frequency.
Fundamentally, all external signals such as data, commands and addresses received by a semiconductor memory apparatus should be in synchronization with an external clock. The set up and hold margins of the data, commands and addresses, which are inputted in synchronization with the external clock may be reduced as the frequency of the clock increases. It is necessary to secure the set up and hold margins of such external signals for accurate operations of the semiconductor memory apparatus.